Modelling and simulation of paradigms for printed circuit board assembly to support the UK's competency in high reliability electronics

The fundamental requirement of the research reported within this thesis is the provision of physical models to enable model based simulation of mainstream printed circuit assembly (PCA) process discrete events for use within to-be-developed (or under development) software tools which codify cause & effects knowledge for use in product and process design optimisation. To support a national competitive advantage in high reliability electronics UK based producers of aircraft electronic subsystems require advanced simulation tools which offer model based guidance. In turn, maximization of manufacturability and minimization of uncontrolled rework must therefore enhance inservice sustainability for ‘power-by-the-hour’ commercial aircraft operation business models. [Continues.

Complex low volume electronics simulation tool to improve yield and reliability

Assembly of Printed Circuit Boards (PCB) in low volumes and a high-mix requires a level of manual intervention during product manufacture, which leads to poor first time yield and increased production costs. Failures at the component-level and failures that stem from non-component causes (i.e. system-level), such as defects in design and manufacturing, can account for this poor yield. These factors have not been incorporated in prediction models due to the fact that systemfailure causes are not driven by well-characterised deterministic processes. A simulation and analysis support tool being developed that is based on a suite of interacting modular components with well defined functionalities and interfaces is presented in this paper. The CLOVES (Complex Low Volume Electronics Simulation) tool enables the characterisation and dynamic simulation of complete design; manufacturing and business processes (throughout the entire product life cycle) in terms of their propensity to create defects that could cause product failure. Details of this system and how it is being developed to fulfill changing business needs is presented in this paper. Using historical data and knowledge of previous printed circuit assemblies (PCA) design specifications and manufacturing experiences, defect and yield results can be effectively stored and re-applied for future problem solving. For example, past PCA design specifications can be used at design stage to amend designs or define process options to optimise the product yield and service reliability

Characterization of printed solder paste excess and bridge related defects

Surface Mount Technology (SMT) involves the printing of solder paste on to printed circuit board (PCB) interconnection pads prior to component placement and reflow soldering. This paper focuses on the solder paste deposition process. With an approximated cause ratio of 50 – 70% of post assembly defects, solder paste deposition represents the most significant cause initiator of the three sub-processes. Paradigmatic cause models, and associated design rules and effects data are extrapolated from academic and industrial literature and formulated into physical models that identify and integrate the process into three discrete solder paste deposition events - i.e. (i) stencil / PCB alignment, (ii) print stroke / aperture filling and (iii) stencil separation / paste transfer. The project’s industrial partners are producers of safety-critical products and have recognised the in-service reliability benefits of electro-mechanical interface elimination when multiple smaller circuit designs are assimilated into one larger Printed Circuit Assembly (PCA). However, increased solder paste deposition related defect rates have been reported with larger PCAs and therefore, print process physical models need to account for size related phenomena

A simulation module for supporting the manufacture of high value added electronics manufacturing

Given the global pressures and demanding requirements for high value added electronics manufacturing, it is vital to make the right decisions on the shop floor. One of the main shop floor level decisions in the domain is the selection of the most appropriate scheduling strategy for the available manufacturing system. Simulation has proved to be a powerful decision support tool. However, very few studies have used this potential to support the evaluation of scheduling strategies in a manufacturing context. A component-based simulation tool to evaluate the performance of scheduling strategies on a particular system is presented in this paper. The component based structure of the simulation tool allows the main problem requirements to be addressed. An example, based on a real company, illustrates the nature of the simulation results and the kind of support that can be obtaine

Complex Low Volume Electronics Simulation Tool to Improve Yield and Reliability

Assembly of Printed Circuit Boards (PCB) in low volumes and a high-mix requires a level of manual intervention during product manufacture, which leads to poor first time yield and increased production costs. Failures at the component-level and failures that stem from non-component causes (i.e. system-level), such as defects in design and manufacturing, can account for this poor yield. These factors have not been incorporated in prediction models due to the fact that systemfailure causes are not driven by well-characterised deterministic processes. A simulation and analysis support tool being developed that is based on a suite of interacting modular components with well defined functionalities and interfaces is presented in this paper. The CLOVES (Complex Low Volume Electronics Simulation) tool enables the characterisation and dynamic simulation of complete design; manufacturing and business processes (throughout the entire product life cycle) in terms of their propensity to create defects that could cause product failure. Details of this system and how it is being developed to fulfill changing business needs is presented in this paper. Using historical data and knowledge of previous printed circuit assemblies (PCA) design specifications and manufacturing experiences, defect and yield results can be effectively stored and re-applied for future problem solving. For example, past PCA design specifications can be used at design stage to amend designs or define process options to optimise the product yield and service reliability

A simulation module for supporting the manufacture of high value added electronics manufacturing

Given the global pressures and demanding requirements for high value added electronics manufacturing, it is vital to make the right decisions on the shop floor. One of the main shop floor level decisions in the domain is the selection of the most appropriate scheduling strategy for the available manufacturing system. Simulation has proved to be a powerful decision support tool. However, very few studies have used this potential to support the evaluation of scheduling strategies in a manufacturing context. A component-based simulation tool to evaluate the performance of scheduling strategies on a particular system is presented in this paper. The component based structure of the simulation tool allows the main problem requirements to be addressed. An example, based on a real company, illustrates the nature of the simulation results and the kind of support that can be obtaine

Characterization of printed solder paste excess and bridge related defects

Surface Mount Technology (SMT) involves the printing of solder paste on to printed circuit board (PCB) interconnection pads prior to component placement and reflow soldering. This paper focuses on the solder paste deposition process. With an approximated cause ratio of 50 – 70% of post assembly defects, solder paste deposition represents the most significant cause initiator of the three sub-processes. Paradigmatic cause models, and associated design rules and effects data are extrapolated from academic and industrial literature and formulated into physical models that identify and integrate the process into three discrete solder paste deposition events - i.e. (i) stencil / PCB alignment, (ii) print stroke / aperture filling and (iii) stencil separation / paste transfer. The project’s industrial partners are producers of safety-critical products and have recognised the in-service reliability benefits of electro-mechanical interface elimination when multiple smaller circuit designs are assimilated into one larger Printed Circuit Assembly (PCA). However, increased solder paste deposition related defect rates have been reported with larger PCAs and therefore, print process physical models need to account for size related phenomena

Current leakage failure of conformally coated electronic assemblies

Conformal coatings are widely used on circuit board assemblies as an attempt to improve reliability and to ensure high insulation impedances, which are for example demanded by low current consumption battery operated RF circuitry. However, components, such as small ceramic capacitors, have occasionally been found to fail in some applications, particularly when covered with a thick silicone conformal coating. This is thought to be due to the diffusion of water through the coating to the capacitor surface where it then combines with solder flux residue, or other organic or ionic contamination left on the components, thereby dramatically increasing the effective component leakage current. The primary objective of this experimental research is therefore to establish a clear understanding of the effects of moisture exposure on the surface insulation resistance (SIR) of conformally coated printed circuit board (PCB) assemblies. This has been achieved through leakage current measurements on multilayer ceramic capacitors during storage in an environmental chamber during testing similar to IPC standards for non-component loaded boards